In the past, vertical-type transistors such as power MOSFETs (Metal Oxide Silicon Field Effect Transistor) have comprised discrete and separate base region cells which define discrete and separate active regions. In a typical device die comprising many of such regions, the regions are electrically coupled together so that they act as a single transistor. Separate cells give rise to certain disadvantages. For example, the base-emitter region of every cell must be shorted for maximum energy. In addition, cell corners have adverse effects on breakdown voltage.
Furthermore, transistor configurations which are alternative to cells, such as stripes, have given rise to particular disadvantages. For example, striped-layout transistors inherently comprise elongated gate fingers. Electrical contact must be made to these elongated gate fingers in order to turn on or turn off the transistor. Conventionally, electrical connection to the elongated gate fingers are made at their extreme ends. Contacting the gate fingers at their ends creates a resistance to the gate finger which varies along its length. Consequently, the transistor's performance characteristics vary along the length of the gate finger. It will be recognized by those skilled in the art that this condition is undesirable.
Consequently, what is needed is a transistor which avoids the problem of individual, separate cells. Furthermore, what is needed is a transistor which has an efficient and effective layout such that transistor performance parameters do not vary materially at different locations of the device.